CPLD Architecture Designed for Superior Pin-Locking

Routability

Excellent

Good*

Poor

Good

Notes: * Decreases with density

36

Yes

90

Yes

32

No

No

No

36

No

18/24

No

No

32

32

32

Fully populated switch

Maximum pterms/Mcell

Bi-directional individual

product term allocation

Function block fan-in

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