Resolving Routing Issues

• Use Multi-Level Synthesis

• Use Dedicated Inputs / global signals for high fan-out signals

• Assgin output signals to Column IOEs for MAX 9000

  • Saves Row FastTrack Interconnect for internal routing

• Change pin assignments

• Use Fitter Settings Dialog Box

  • Try Advanced Try Harder/Longer Compilation Fitting

• Insert LCELLs to reduce fan-in and shared expanders per macrocell

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