Analyzing and Improving Results

• tSU Or tCO Goals Not Met? Try ...

  • FAST_I/O Assignment on Necessary Individual Pins
  • tSU or tCO Timing Requirements Individually on Necessary Pins
    • If FAST_I/O Will Decrease fMAX below Target fMAX
    • If Combinatorial Logic between Pin and Register Prevents Use of IOE Register
    • If Target Device is EPF10K10 - EPF10K50 or EPF10K50V, LE Register Provides Better Set-up Time than IOE Register
  • Placement Assignments for Pins and/or Registers

• Consider Re-Compiling and Re-Analyzing Results after Each Suggestion

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