VHDL Basics

• VHDL Design Units

  • Entity
    • Used to define external view of a model. i.e. symbol
  • Architecture
    • Used to define the function of the model. i.e. schematic
  • Configuration
    • Used to associate an Architecture with an Entity
  • Package
    • Collection of information that can be referenced by VHDL models. I.e. Library
    • Consist of two parts Package Declaration and Package Body.

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