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Example - Counter using a variable
- Counters are accumulators that always add a ¡®1¡¯ or subtract a ¡®1¡¯
Arithmetic expression assigned to a
Variable assigned to a Signal inside the IF-THEN statement, that checks the clock condition, will infer registers
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
PORT (clk, rst, updn : in std_logic;
q : out std_logic_vector(15 downto 0));
ARCHITECTURE logic OF count_a IS
VARIABLE tmp_q : std_logic_vector(15 downto 0);
ELSIF rising_edge(clk) THEN