Component Declaration and Instantiation

dime => tdime

lower-level port

current-level port

LIBRARY ieee;

USE ieee.std_logic_1164.all;

ENTITY tolleab IS

PORT( tclk : IN STD_LOGIC;

tcross, tnickel, tdime, tquarter : IN STD_LOGIC;

tgreen, tred : OUT STD_LOGIC);

END tolleab;

ARCHITECTURE tolleab_arch OF tolleab IS

TYPE STATE_TYPE IS (cent0, cent5, cent10, cent15, cent20, cent25, cent30,

cent35, cent40, cent45, cent50, arrest);

SIGNAL connect : STATE_TYPE;

COMPONENT tollv

PORT( clk: IN STD_LOGIC;

cross, nickel, dime, quarter : IN STD_LOGIC;

green, red : OUT STD_LOGIC;

sout : OUT STATE_TYPE;

state_in : IN STATE_TYPE);

END COMPONENT;

BEGIN

u1 : tollv PORT MAP (clk => tclk, cross => tcross, nickel => tnickel, dime => tdime,

quarter => tquarter, green => tgreen, red => tred,

sout => connect, state_in => connect);

END tolleab_arch;