Features

The Timing Analyzer offers the following interface, report, filters, macro, and analysis interrupt features.

Interface

You can issue Timing Analyzer commands from the menus, toolbar, or Console window. You can also activate commands by running macros. The instructions in this user guide use only the menu commands or toolbar buttons, but the equivalent command-line syntax is given in the “Keyboard Commands” chapter.

Reports

The Timing Analyzer can create the following seven reports.

• Timing Constraints Analysis report compares design performance to the timing constraints.
  
  
• Advanced Design Analysis report displays the results of analyzing the constraints specified in the constraints file for FPGAs. If no constraints are specified, this report displays the maximum clock frequencies for all clocks in the design and the worst-case timing for all clock paths. For CPLDs, it displays all external synchronous path delays which include: pad-to-pad (t_PD), clock pad-to-output pad (t_CO), setup-to-clock-at-the-pad (t_SU), and internal clock-to-setup (t_CYC) paths.
  
  
• Custom Analysis report contains a detailed analysis of all specified paths and includes the worst-case path delays for all paths in the design. You can filter this report.
  
  
• Clocks report lists the names of all clocks in the design.
  
  
• Settings report lists the current settings set with commands in the Path Filters and Options menus.
  
  
• Query Nets report displays net delay information. (FPGA only)
  
  
• Query TimeGroups displays time group information. (FPGA only)
  
  

The content of these reports is described in the “How to Use the Timing Analyzer” chapter.

Path Filtering Commands

You can customize Timing Analyzer reports by specifying filters in the dialog boxes which you access through the commands in the Path Filters menu. The Reset Path Filters command resets the path filters to default settings. The Path Filters menu contains the Timing Constraint Filters, Custom Filters, and Common Filters submenus which have the following functionality:

• Timing Constraint Filters commands affect only the Timing Constraints Analysis and Advanced Design Analysis reports.
  
  
• Custom Filters commands deal with specific paths whose starting points and ending points you can define. These commands apply to the Custom Analysis reports.
  
  
• Common Filters commands exclude or include paths with specific nets and control path tracing. These commands apply to the Timing Constraints Analysis, Advanced Design Analysis, and Custom Analysis reports.
  
  

Macros

You can create macros that execute multiple Timing Analyzer commands in one step. Macros are script files for running Timing Analyzer commands and options. The Console window records all the commands that you execute in any Timing Analyzer session. After entering the desired series of commands in this window, you can copy and paste the sequence into a macro document, save the macro document, and run it.

Analysis Interrupt

The commands in the Analyze menu have an interrupt function when analyzing FPGA designs. A Timing Analysis in Progress dialog box with an Abort button appears. Clicking the button, the Esc key, or the Enter/Return key stops analysis. A report is not generated or displayed.