Demonstration Board Overview
The following sections detail the device and software support for the FPGA Demonstration Board, as well as describing the board's general features.
Device Support
The FPGA Demonstration Board supports the following Xilinx FPGA families.
- XC3000, XC3100, XC3000A, XC3000L
- XC3100A
- XC4000, XC4000E
- Spartan Product Families
NOTEThe Spartan series is a low-cost FPGA family, based on the XC4000 devices. See the Xilinx web site or the 1998 Xilinx Databook for more information about Spartan.
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Download Cable Support
The FPGA Demonstration Board is shipped with two short "ribbon" cables which can be used to configure FPGAs. You can also configure designs with the XChecker cable (slave serial mode), the onboard XC17PD8 PROM (master serial mode), or the Parallel Cable III, a JTAG cable. For more information on connecting XChecker cable or the Parallel Cable III, see the Cable Hardware chapter.
Software Support
Two Xilinx software packages can be used with this demonstration board.
- XChecker is a command line text-only program, available for both PC and Workstation platforms. The XChecker Software supports the XChecker cable only.
- Hardware Debugger, a GUI-type program, is the recommended software for use with this demonstration board. For more information on using Hardware Debugger with the demonstration board, see the Demonstration Board Operation section.
Board Features
The FPGA Demonstration Board is shipped with two devices, the XC3020APC68 and XC4003EPC84. The board has the following features.
- One socket for an XC3000 PC68 device
- One socket for an XC4000 PC84 device
- One XC17PD8 socket for each FPGA
- An XChecker/Parallel Cable III header for each FPGA
- Daisy-chain configuration with the XC4000 device at the head of the chain
- Total of three 8-pin DIP switches to set up the XC4000 and XC3000 FPGAs, as shown in the following table.
Table 1_1 DIP Switch Configuration
XC3000 SW1
| XC4000 SW2
| Switch
|
INP
| PWR
| 1
|
MPE
| MPE (multiple configurations)
| 2
|
SPE
| SPE (single configuration)
| 3
|
M0
| M0
| 4
|
M1
| M1
| 5
|
M2
| M2
| 6
|
MCLK
| RST
| 7
|
DOUT
| INIT
| 8
|
- 16 I/O lines that connect the two FPGAs
- An external relaxation oscillator circuit available to the user for the XC3000
- The XC4000 OSC4 library symbol, which uses pin 19 of the XC4003E to drive the XC3000 TCLKIN on pin 11 of the XC3020A
- The XC4000 OSC4, uses pin 13 to drive the XC3000 alternate clock buffer (BCLKIN) on pin 43
- Eight general purpose input switches to provide logic inputs to the FPGAs
- Program, Reset, and Spare Active Low push-button switches, which are common to both FPGAs
- An XC3000A display for the XC3000 device. The display uses eight LED bars in one row and one 7-segment LED, as shown in theFPGA Demonstration Board Displays figure.
- An XC4000A display for the XC4000 device. The display uses eight LED bars in one row and two 7-segment LEDs, as shown in theFPGA Demonstration Board Displays figure.
- Space for an optional +5 V regulator for battery operation
- Space for an optional crystal oscillator
- Headers for FPGA probe points
- A prototype area on the PC board