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Multiple printed and online books are available for the Foundation Series 2.1i product and the various tools included with it.
The Foundation Series 2.1i Installation Guide and Release Notes describes installation procedures, new features, supported devices, and the most critical known issues. It also includes information on the software license required for the Base Express and Foundation Express products.
The Foundation Series 2.1i Quick Start Guide provides an overview of the features and additions to Xilinx's 2.1i software. This book contains a tutorial overview of design entry tools and design implementation tools.
Adobe Acrobat PDF files for viewing and printing all of the Foundation Series 2.1i online books can be found in the print directory on the Documentation CD-ROM. Refer to the Foundation Series 2.1i Installation Guide and Release Notes for information on accessing and printing the PDF files. Or, click Help in the Document Viewer for instructions.
The online Foundation Series 2.1i book collection is available from the Foundation Series 2.1i Documentation CD or from the Xilinx support page on the web at http://support.xilinx.com. You must use a Java-enabled HTML browser to view the Xilinx online books. If you do not already have an appropriate browser on your PC, you can install Netscape 4.0 from the Foundation Design Environment CD-ROM or the Foundation Documentation CD-ROM.
The Document Viewer provided with Foundation Series 2.1i is powered by the Docsan™ indexing tool. This tool provides your HTML browser with optimal searching capabilities within the online book collection. Refer to the online help provided with the Document Viewer for detailed instructions on using this tool.
The following online books contain information that applies only to the Xilinx Foundation Series products.
| Title | Description |
|---|---|
| Foundation Series 2.1i Quick Start Guide | This guide gives an overview of the features and additions to Xilinx's Foundation 2.1i product. The primary focus of this guide is to show the relationship between the design entry tools and the design implementation tools. The guide also contains in-depth tutorials for a schematic-based and HDL-based stop watch design. |
| Foundation Series 2.1i User Guide | This guide provides a detailed description of the Foundation design methodologies, design entry tools, and both functional and timing simulation. The manual also briefly describes the Xilinx design implementation tools. |
| Verilog Reference Guide | This manual describes how to use Xilinx Foundation Express to translate and optimize a Verilog description into an internal gate-level equivalent. |
| VHDL Reference Guide | This manual describes how to use Xilinx Foundation Express to translate and optimize a VHDL description into an internal gate-level equivalent. |
The following books contain additional information not found in the Foundation-specific books regarding the Xilinx schematic library components (and constraints) and LogiBLOX.
| Title | Description |
|---|---|
| Libraries Guide | This book describes the logic elements (primitives or macros), that you use to create your designs as well as the attributes and constraints used to process elements during logic implementation. It also discusses relationally placed macros (RPMs), which are macros that contain relative location constraints (RLOC) information. The Xilinx libraries enable you to convert designs easily from one family to another. |
| LogiBLOX Guide | This guide describes the high-level modules you can use to speed up design entry and the attributes that support logic synthesis, primarily for FPGA architectures. It also explains how to use the LogiBLOX program to create designs and the different types of logic synthesis completed by the LogiBLOX program. |
Note: The CORE Generator User Guide is not currently part of the online book collection. It is an Adobe Acrobat file (.pdf) that can be accessed from the CORE Generator Help menu (Help 
Online Documentation.)
The following book contains general information on Synthesis and Simulation.
| Title | Description |
|---|---|
| Synthesis and Simulation Design Guide | This manual provides a general overview of designing FPGAs with Hardware Description Languages (HDLs). It includes design hints for the novice HDL user, as well as for the experienced user who is designing FPGAs for the first time. |
The following books contain detailed information on the Xilinx implementation tools. Much of the information contained in these books is for the standalone or command line versions of the tool.
| Title | Description |
|---|---|
| Constraints Editor Guide | This manual describes the Xilinx Constraints Editor GUI that can be used after the design has been implemented to modify or delete existing constraints or add new constraints to a design. |
| Design Manager/ Flow Engine Guide | This manual describes the Design Manager, a Xilinx Alliance Series tool for managing multiple implementations of the same design. This manual also explains the Xilinx Flow Engine, which implements designs, and explains how to interact with other programs that run in the Design Manager environment; namely, the Design Editor, the Timing Analyzer, the Hardware Debugger, the PROM File Formatter, and the PROM Programmer. |
| Development System Reference Guide | This book describes the Xilinx design implementation software, which includes programs to generate EDIF files, LCA files, and BIT files. The book covers all the program options and files that are generated by these programs. It also contains in-depth information on timing constraints. |
| FPGA Editor Guide | The FPGA Editor is a graphical editor used to display and configure FPGAs. The FPGA Editor enables you to place and route critical components before running automatic place and route tools on an entire design, modify placement and routing manually, interact with the physical constraints file (PCF) to create and modify constraints, and verify timing against constraints. |
| Floorplanner Guide | This book describes the Floorplanner, a graphical interface tool to help you improve performance and density of your design. |
| Hardware User Guide | This manual describes the Xilinx Demonstration hardware and its associated software interfaces. The hardware includes the FPGA and CPLD demonstration boards, which are used for design verification. |
| Timing Analyzer Guide | This manual describes Xilinx's Timing Analyzer program, a graphical user interface tool that performs static analysis of a mapped FPGA or CPLD design. The mapped design can be partially or completely placed, routed, or both. |
Detailed information on the device programming process is included in the following books.
| Title | Description |
|---|---|
| JTag Programmer Guide | This guide documents the graphical interface used for in-system programming and verification of CPLD and FPGA parts. The guide also describes how to set up and use JTAG download cables. |
| Hardware Debugger Guide | (FPGAs only) This manual describes how to program, verify, and debug FPGA devices. It describes the XChecker, MultiLINX, and Parallel III cables and explains how to connect the cable pins to your target device for various functions: downloading, verification, and debugging. It also includes a tutorial for debugging a design using the demonstration boards as target devices. |
| PROM File Formatter Guide | (FPGAs only) This manual explains how to use a Windows-based tool to format bitstream files into HEX format files compatible with Xilinx and third-party PROM programmers. You use the PROM files to program a PROM device, which is then used to configure daisy chains of one or more FPGAs for one application (configuration) or several applications (reconfiguration). |