std_logic_misc Package

This package resides in the Xilinx Foundation synthesis libraries directory ($XILINX/synth/lib/packages/IEEE/src/std_logic_misc.vhd). The std_logic_misc package declares the primary data types the Foundation Express VSS tools support.

Boolean reduction functions take one argument, an array of bits, and return a single bit. For example, the AND reduction of “101” is “0”, the logical AND of all three bits.

Several functions in the std_logic_misc package provide Boolean reduction operations for the predefined type STD_LOGIC_VECTOR. The following example shows the declarations of these functions.

function AND_REDUCE  (ARG: STD_LOGIC_VECTOR) return UX01;

function NAND_REDUCE (ARG: STD_LOGIC_VECTOR) return UX01;

function OR_REDUCE   (ARG: STD_LOGIC_VECTOR) return UX01;

function NOR_REDUCE  (ARG: STD_LOGIC_VECTOR) return UX01;

function XOR_REDUCE  (ARG: STD_LOGIC_VECTOR) return UX01;

function XNOR_REDUCE (ARG: STD_LOGIC_VECTOR) return UX01;

function AND_REDUCE  (ARG: STD_ULOGIC_VECTOR) return UX01;

function NAND_REDUCE (ARG: STD_ULOGIC_VECTOR) return UX01;

function OR_REDUCE   (ARG: STD_ULOGIC_VECTOR) return UX01;

function NOR_REDUCE  (ARG: STD_ULOGIC_VECTOR) return UX01;

function XOR_REDUCE  (ARG: STD_ULOGIC_VECTOR) return UX01;

function XNOR_REDUCE (ARG: STD_ULOGIC_VECTOR) return UX01;

These functions combine the bits of STD_LOGIC_VECTOR, as the name of the function indicates. For example, XOR_REDUCE returns the XOR value of all bits in ARG.

The following example shows some reduction function calls and their return values.

AND_REDUCE("111") = '1'

AND_REDUCE("011") = '0'

OR_REDUCE("000")  = '0'

OR_REDUCE("001")  = '1'

XOR_REDUCE("100") = '1'

XOR_REDUCE("101") = '0'

NAND_REDUCE("111") = '0'

NAND_REDUCE("011") = '1'

NOR_REDUCE("000") = '1'

NOR_REDUCE("001") = '0'

XNOR_REDUCE("100") = '0'

XNOR_REDUCE("101") = '1'