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VHDL Reference Guide
Chapter 5: Sequential Statements

exit Statements

The exit statement completes execution of an enclosing loop statement, called label in the syntax. The completion is conditional if the statement includes a condition, such as the when condition in the following syntax.

exit [ label ] [ when condition ] ;

The example below compares two bit vectors. An exit statement exits the comparison loop when a difference is found. The corresponding circuit design is shown in the figure following this example.

entity example5 16 is
   port(
      signal A, B: in BIT_VECTOR(1 downto 0);
      signal A_LESS_THAN_B: out Boolean;
      );
end example5 16;

architecture behave of example5 16 is

begin
process (A, B)
begin

A_LESS_THAN_B <= FALSE;

for I in 1 downto 0 loop
if (A(I) = '1' and B(I) = '0') then
A_LESS_THAN_B <= FALSE;
exit;
elsif (A(I) = '0' and B(I) = '1') then
A_LESS_THAN_B <= TRUE;
exit;
else
null; -- Continue comparing
end if;
end loop;
end process;
end behave;

Figure 5.8 Circuit Design for Comparator Using the exit Statement