PPT 슬라이드
1. All possible conditions must be specified. 2. No conditions can overlap. 3. All range specifications must be of a discrete type.
process (A, B, C, D, Sel ) begin case Sel is when “00” => Z <= A ; when “01” => Z <= B ; when “10” => Z <= C ; when others => Z <= D ; end case ;
- Case statements are preferable for LUT architectures given that most synthesis tools will produce a mux, or similarly minimal logic level structure.
With sel select Z <= A when “00”, B when “01”, C when “10”, D when others;
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