Step 2: Specifying Options

Each time a change is made to the input design, a new design version must be created in the Design Manager. You can then use the tools to create as many implementation revisions as you like for that design version. For example, when attempting to try different implementation strategies on a given netlist, you are creating several revisions for a singe version. By default, the Design Manager only keeps track of the Xilinx-created files. The input design is not stored with the implementation data in the Xilinx implementation project area.

NOTE

This tutorial describes the basic flow. For detailed information on flows and implementation methodologies using the Alliance Series Design Implementation Tools, see the online version of the Development System Reference Guide.

1. Select Design Implement
   
   The Design Manager prompts for the correct device by displaying the Implement window. Notice that the Part field already contains the value 'XC4002XL-09-PC84'. This information was read by the Design Manager from the input netlist (count8.xnf). The Implement dialog box is also displayed with the default version, 'ver1', and revision, `rev1', to be created.
   
   
2. Select Options to open the Options dialog box.
   
   The Options dialog box allows you to specify a user constraints file and any optional processing targets. You can also access three types of templates (implementation, simulation, and configuration).
   
   Templates provide a convenient way to have several groups of option settings that you can select from when you implement a design. The available options depend on the target device family. For example, you can have a template for quick place and route and another to implement a certain configuration option.
   
   
3. Verify that the entire path to the count8.ucf file is specified in the User Constraints field.
   
   When initially creating a project, if you include a user-generated UCF file in the same directory as your input design file, then the UCF file automatically appears in this field.
   
   You can open the count8.ucf file with a text editor to view the constraints specified for this particular design. For a detailed explanation of constraints as well as examples with proper syntax, refer to the Xilinx Libraries Guide.
   
   
4. Select Edit Template for the Implementation Program Option.
   
   The XC4000 Implementation Options dialog box is displayed. The implementation templates control how the software maps, places, routes, and optimizes a design.
   
   

   Figure 3.2 XC4000 Implementations Options Dialog Box

5. Select the Timing Reports tab.
   
   
6. Select Produce Logic Level Timing Report. The option to Produce Post Layout Timing Report should be selected by default.
   
   The timing reports, generated after MAP and PAR, are useful in evaluating design performance. They are analyzed in detail later in this tutorial.
   
   
7. Click OK once to save the Implementation options, then again to exit the Options dialog box.