Comparing Design Compiler and FPGA Compiler

XSI contains libraries for XC3000A, XC3000L, XC3100A, XC3100L, XC4000E, XC4000L, XC4000EX, XC4000XL, XC4000XLA, XC4000XV, and XC5200 FPGAs. You can use either FPGA Compiler or Design Compiler to synthesize a design for these devices. Generally, for XC4000L and XC4000XL devices, you can use the XC4000E and the XC4000EX synthesis libraries, respectively.

This manual assumes that you use FPGA Compiler synthesis tools for XC4000E/L/EX/XL/XLA/XV and XC5200 devices. If you do not have FPGA Compiler, XSI provides XC4000E/L/EX/XL/XLA/XV and XC5200 libraries for use with Design Compiler. You can use FPGA Compiler for XC3000 and XC3100 devices, but the libraries for these devices use the Design Compiler synthesis features.

Design Compiler (V3.4b or later) offers the following features.

• Optimizes flip-flops without clock enables, and latches in the input/output block (IOB)
  
  
• Optimizes 3-state buffers in the IOB
  
  
• Encodes one-hot state machines
  
  
• Automatically uses the configurable logic block (CLB) Clock Enable pin
  
  

FPGA Compiler offers the previously described Design Compiler features, as well as the following.

• Optimizes logic to the XC4000E/L/EX/XL/XLA/XV CLB and IOB architectures
  
  
• Reports area and timing by device architecture, for example, CLB, IOB, and 3-state buffer
  
  
• Passes timing constraints to the core tools
  
  
• Uses lookup table (LUT) optimization for XC3000A/L, XC3100A/L, and XC5200 devices. These new libraries that use the LUT optimization allow FPGA Compiler to synthesize your design to a collection of lookup tables, registers, and I/O pads.