Using the Xilinx Development System

To translate your design to a bit file so the Xilinx tools can program your device, perform the following steps.

1. Run NGDBuild on the SXNF or SEDIF file to create an NGD file.
   
   
2. Run the MAP program on the NGD file to create a mapped NCD file.
   
   
3. Run the TRACE program to determine if PAR will meet your timing goals.
   
   
4. Run PAR on the NCD file to place and route your design.
   
   
5. Run TRACE again on your placed and routed design.
   
   
6. Run NGDAnno on your routed design to create an NGA file.
   
   
7. Run either NGD2VHDL or NGD2VER on the NGA file to create a VHD or VER file that can be simulated with the appropriate simulators.
   
   
8. Run the BitGen program to create a bitstream for programming the FPGA.