Chapter 4

Using Timing Constraints

The timing constraints described in this chapter are compatible with the following families.

• XC3000A/L
  
  
• XC3100A/L
  
  
• XC4000E/L
  
  
• XC4000EX/XL/XLA/XV
  
  
• XC5200
  
  
• Virtex
  
  
• Spartan
  
  
• SpartanXL
  
  

This chapter describes how you specify timing constraints, and contains the following sections.

• “Timing Requirements and Xilinx Software”
  
  
• “Entering Timing Specifications”
  
  
• “Specifying Groups”
  
  
• “Defining a Clock Period (PERIOD Constraint)”
  
  
• “OFFSET Timing Specifications”
  
  
• “Ignoring Selected Paths (TIG)”
  
  
• “Basic FROM -TO Syntax”
  
  
• “Specifying Timing Points”
  
  
• “Using TPTHRU or TPSYNC in a FROM-TO Constraint”
  
  
• “Specifying Time Delay in TS Attributes”
  
  
• “Using the PRIORITY Keyword”
  
  
• “Sample Schematic Using TIMESPEC/TIMEGRP Symbol”
  
  
• “Prorating Constraints”
  
  
• “Additional Timing Constraints”
  
  
• “Constraints Priority”
  
  
• “Syntax Summary”