The power consumption of each macrocell in a CPLD device is programmable. The standard (default) setting consumes more power and produces shorter propagation delay. The low-power setting reduces power consumption for less speed-critical paths. By default, all macrocells in the design will operate in standard power mode.
You can apply the PWR_MODE attribute to specific components in the schematic. To specify that the macrocell(s) used to implement a logic function are to operate in low-power mode, apply the following attribute to the corresponding component or its output net in your schematic:
PWR_MODE=LOW
To specify standard power mode for a function (in case the global power was changed to low), apply the following attribute to a component or its output net:
PWR_MODE=STD
The PWR_MODE attribute can be applied to any logic or flip-flop component in the schematic, including a macro component that has multiple output signals. The PWR_MODE attribute affects all macrocells used to implement the selected component.
If a component such as a logic gate or inverter is collapsed into another component, the PWR_MODE attribute is not carried forward by the software. You may therefore need to apply the PWR_MODE attribute to several components in a logic path to be sure that all macrocells used to implement the path are set to low-power mode.
The PWR_MODE attribute has no effect on components that are not implemented using macrocell logic, such as I/O buffers.
To set all macrocells to the Low Power Mode throughout the design, set Macrocell Power Setting to Low in the Basic menu of the Implementation Options Template in the Design Manager.
By setting the Power Mode to Low in the template, macrocells will operate in low power mode except where you specify the PWR_MODE=STD attributes in the design.
If you want the fitter to automatically select the power mode for individual macrocells based on timing constraints you enter for your design, set Default Power Setting to Timing Driven. Macrocells involved in timing-constrained paths will have their power settings automatically switched to Low only if the low-power propagation delay still allows the macrocell to satisfy all applicable timing constraints. Macrocells that do not participate in timing-constraint paths will operate in standard power mode (Std). Applying the PWR_MODE attribute always overrides the Default Power Setting.
Low-power macrocells are slower than standard-power outputs. If you have a mixture of low- and standard-power macrocells, pay close attention to simulation results or the timing report to see how the power settings affect timing interactions.
