A loop statement repeatedly executes a sequence of statements. The syntax follows.
[label :] [iteration_scheme] loop
{ sequential_statement }
{ next [ label ] [ when condition ] ; }
{ exit [ label ] [ when condition ] ; }
end loop [label];
The optional label names the loop and is useful for building nested loops. Each type of iteration_scheme is described in this section.
The next and exit statements are sequential statements used only within loops. The next statement skips the remainder of the current loop and continues with the next loop iteration. The exit statement skips the remainder of the current loop and continues with the next statement after the exited loop.
VHDL provides three types of loop statements, each with a different iteration scheme.
The for...loop statement has an integer iteration scheme, where the number of repetitions is determined by an integer range. The loop is executed once for each value in the range. After the last value in the iteration range is reached, the loop is skipped, and execution continues with the next statement after the loop.
Noncomputable loops (loop and while...loop statements) must have at least one wait statement in each enclosed logic branch. Otherwise, a combinatorial feedback loop is created. See the Wait Statements section of this chapter for more information.
Conversely, computable loops (for...loop statements) must not contain wait statements. Otherwise, a race condition might result.
The loop statement, with no iteration scheme, repeats enclosed statements indefinitely. The syntax follows.
[label :] loop
{ sequential_statement }
end loop [label];
The optional label names this loop.
Sequential_statement can be any statement described in this chapter. Two sequential statements are used only with loops; the next statement, which skips the remainder of the current loop iteration, and the exit statement, which terminates the loop. These statements are described, respectively, in the Next Statements section and the Exit Statements section of this chapter.
A loop statement must have at least one wait statement in each enclosed logic branch. See the Wait Statements section of this chapter for an example.
The while...loop statement repeats enclosed statements as long as its iteration condition evaluates to TRUE. The syntax follows.
[label :] while condition loop
{ sequential_statement }
end loop [label];
The optional label names this loop. Condition is any Boolean expression, such as ((A = '1') or (X < Y)).
Sequential_statement can be any statement described in this chapter. Two sequential statements are used only with loops; the next statement, which skips the remainder of the current loop iteration, and the exit statement, which terminates the loop. These statements are described, respectively, in the Next Statements section and the Exit Statements section of this chapter.
A while...loop statement must have at least one wait statement in each enclosed logic branch. See the Wait Statements section of this chapter for an example.
The for...loop statement repeats enclosed statements once for each value in an integer range. The syntax follows.
[label :] for identifier
in range loop
{ sequential_statement }
end loop [label];
The optional label names this loop.
The use of identifier is specific to the for...loop statement. The following conditions apply.
Foundation Express currently requires that range must be a computable integer range (see the Computable Operands section of the Expressions chapter) in either of the following two forms.
integer_expression to integer_expression
integer_expression downto integer_expression
Each integer_expression evaluates to an integer.
Sequential_statement can be any statement described in this chapter. Two sequential statements are used only with loops; the next statement, which skips the remainder of the current loop iteration, and the exit statement, which terminates the loop. These statements are described, respectively, in the Next Statements section and the Exit Statements section of this chapter.
A for...loop statement must not contain any wait statements.
A for...loop statement executes as follows.
The example below shows two equivalent code fragments. The resulting circuit is shown in the figure following the example.
variable A, B: BIT_VECTOR(1 to 3);
-- First fragment is a loop statement
for I in 1 to 3 loop
A(I) <= B(I);
end loop;
-- Second fragment is three equivalent statements
A(1) <= B(1);
A(2) <= B(2);
A(3) <= B(3);
Figure 6.5 Circuit for for...loop Statement with Equivalent Fragment |
You can use a loop statement to operate on all elements of an array without explicitly depending on the size of the array. The following example shows how the VHDL array attribute 'range can be used - in this case to invert each element of bit vector A. A figure of the resulting circuit follows the example.
variable A, B: BIT_VECTOR(1 to 10);
>. . .
for I in A'range loop
A(I) := not B(I);
>end loop;
Figure 6.6 Circuit for for...loop Statement Operating on an Entire Array |
Unconstrained arrays and array attributes are described in the Array Types section of the Data Types chapter.