PPT 슬라이드

*Standard Interface Netlist Format

** Standard Delay Format

Schematic Entry /

View Schematic

Viewlogic

ViewDraw

Place & Route

PAR (Place & Route)

Structural Simulation / Functional Simulation

Viewlogic

ViewSim

**SDF

Netlist

(XNF or *EDIF)

Implementation Tools

VHDL,

*XNF

Waveform Analysis

Viewlogic

ViewTrace

Timing

Simulation

Viewlogic

ViewSim

Timing Annotated

EDIF Netlist

VHDL Entry & Compile

Viewlogic

ViewSyn

VHDL Synthesis

Viewlogic

ViewSyn

Behavioral Simulation

Viewlogic

Speedwave

Design Flow

M1

이전 슬라이드

다음 슬라이드

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