Application Example:Satellite Modem Receiver
~
~
Complete design occupies 60% of XC4062XL FPGA Would require 12 DSP C16-type processors
Generate each block
with the Xilinx
DSP CORE Generator
4:1
Complex
Demod
~
~
~
4:1
32-TAP FIR
Decimate
48-TAP
FIR
~
~
~
Base-
band proc.
I
Q
20 MHz
4 multipliers
5 MHz
~
~
~
~
ÀÌÀü ½½¶óÀ̵å
´ÙÀ½ ½½¶óÀ̵å
ù ½½¶óÀ̵å·Î À̵¿
±×·¡ÇÈ ¹öÀü º¸±â