Architecture Innovation Leadership
Distributed Dual Port RAM
I/O Registers
Internal Bussing
5V Tolerant I/O
3.3V and 5V PCI
Features
133 MHz Block Dual Port RAM
System I/O (LVTTL, SSTL, GTL)
Vector Based Interconnect
Phase Locked Loops
66 MHz 64-Bit PCI
1998 1999 2000 2001 2002
Reconfigurable Logic
On-Chip A/D-D/A
Embedded Functions
1GHz Diff. Interface
Built-in Logic Analyzer
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