Xilinx FPGA Architecture Story
1997
11,000 Logic Cells (125k gates)
fastest RAM
5 volt tolerant IOs
buffered quad line
VersaRing IOs
6ns pin-to-pin
efficient segmented routing
lowest power
2000
65,000 Logic Cells(800k gates)
built-in logic analyzer
D/A & A/D support
custom cores
high speed differential interface (500MHz)
1998
32,000 Logic Cells(400k gates)
programmable IOs
Advanced Clocking
100MHz system speed
fast re-configure
hierarchical memory solution
ÀÌÀü ½½¶óÀ̵å
´ÙÀ½ ½½¶óÀ̵å
ù ½½¶óÀ̵å·Î À̵¿
±×·¡ÇÈ ¹öÀü º¸±â