Xilinx FPGA Architecture

Programmable

Interconnect

I/O Blocks

(IOBs)

• High Density -> 1M System Gates

• SRAM Based LUT for Synchronous Dual Port RAM or Logic

• ASIC-like array structure

• Built-in Tri-States

• Infinite reconfigurations, downloaded from PC or workstation in ~1 second

Configurable

Logic Blocks (CLBs)

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