Express Design Process
1. Analyze - Syntax check
2. Implement - Create generic logic design (Elaborate)
3. Enter constraints and options
4. Synthesize - Optimize the design for specific device
5. Export XNF Netlist
6. Implement layout with Xilinx Design Manager
ÀÌÀü ½½¶óÀ̵å
´ÙÀ½ ½½¶óÀ̵å
ù ½½¶óÀ̵å·Î À̵¿
±×·¡ÇÈ ¹öÀü º¸±â