Period and Offset Constraints

• Two commands are used to describe synchronous delays

  • Period defines the clock
  • Offset constraints define input arrival time and output stability time relative to the clock

• Xilinx software determines internal FPGA delays from Period and Offset constraints

• Syntax:

  NET clock_name PERIOD = some_delay time_unit;
  
  NET input_name OFFSET = IN Tarrival time AFTER clock_name;
  NET output_name OFFSET = OUT Tstable BEFORE clock_name;
  (Input_name and output_name are the names of nets connecting to the IO Pad)

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