Creating Counters Using Verilog
always@(posedge CLK or posedge CLEAR)
begin
if(CLEAR)
COUNT=1'b0;
else //if(CLK)
begin
if(LOAD)
COUNT = DIN;
else
begin
if(CE)
end begin
end if(UP) //Up Counter
end COUNT=COUNT+1;
else
COUNT=COUNT-1; //Down Counter
end