UDP - Latch

primitive latch (q, clock,data); // Level sensitive, active low

output q;

reg q;

input clock, data;

initial q = 1'b0; // Output is initialized to 1'b0.

// Change 1'b0 to 1'b1 for power up Preset

table

// clock data current state next state

0 1 :?: 1;

0 0 :?: 0;

1 ? :?: -; // ‘-’ = no change

endtable

endprimitive