In Design
“Free” Control Signals of Counter Modes
- Up/Down Counter Mode - Up/Down, Counter Enable, Synchronous Load
- Clearable Counter Mode - Counter Clear, Counter Enable, Synchronous Load
- Extra Control Logic = Extra LUTs Used Overall and Along Paths
One-Hot State Machine Encoding is Usually Most Efficient
- Register-Rich Architecture
- Results Depend on Quality of One-Hot Optimization within HDL Synthesis Tool