Debugging a Configured FPGA

After configuring a device, you can analyze its behavior by taking snapshots of the device's probe points. Flip-flops, RAMs, CLB outputs, and IOBs are all probe points and are read back when a snapshot of the device is taken. See the “Probe Points in FPGA Devices” table of the “Introduction” chapter for more information.

There are two debugging modes for capturing the states of a device: synchronous and asynchronous.

During synchronous debugging, you use the XChecker cable to control your system clock and the state of your design. This allows you to probe the internal nodes at states that are known and stable. To control the clock, you can use the XChecker internal clock, as opposed to a system clock or a device clock. The XChecker cable can also interface with a system clock, enabling you to start and stop the clock.

During asynchronous debugging, the Hardware Debugger does not control the clock and therefore does not control which states are captured. Use asynchronous debugging if you have an onboard microprocessor or equivalent device that allows you to control the state of your FPGA.

NOTE

If the state is not frozen while the internal nodes are probed, the values on some probes may reflect one state while values on other nodes may reflect a later state. This occurs because the values of the nodes can change during the time it takes for probing.

Debugging Overview

This section summarizes the debugging process. For more details, continue with the “Synchronous Mode Debugging” section or the “Asynchronous Mode Debugging” section. To perform debugging, meet the criteria for verification and debugging listed in the “Verifying Design Logic” section of the “Programming a Device or a Daisy Chain” chapter.

After you download a BIT file using the Download Download Design command, you can read back the states of the configured device using the Debug menu commands.

1. Choose a debugging mode by selecting either Debug Synchronous Mode or Debug Asynchronous Mode.
   
   
2. Set the appropriate options, such as the trigger type, the signals to display, and, in the case of synchronous debugging, the clock options, using the Debug Settings submenu.
   
   For more information on the commands in this submenu, see the “Menu Commands” chapter.
   
   
3. Open a new waveform window by selecting File New Waveform.
   
   
4. Click Display to select the signals for display.
   
   
5. Click Read to read the signals that you selected for display.
   
   The signals are displayed in the active waveform window.
   
   

Debugging a Previously Debugged Design

To debug a previously debugged design, specify the debug mode after opening the design. The Hardware Debugger loads the relevant settings for the specified debugging mode. The data, summarized in the “Available Synchronous and Asynchronous Settings” table, is saved in your project file, design_name.xck.

Table 6_1 Available Synchronous and Asynchronous Settings