Foundation Series 2.1i User GuideChapter 11: Design Implementation
Setting Control Files
You can designate a user constraints file, guide files, or Floorplan files to control the current implementation. You can set the control files from the Project Manager's Implementation pulldown menu or via the Control Files Set button on the Synthesis/Implementation dialog box.
User Constraints File
User constraints files (design_name.ucf) contain logic placement and timing requirements to control the implementation of your design. Refer to the Foundation Constraints appendix for detailed information on creating .ucf files and on constraint syntax.
If you want to control the implementation of your design with a user constraints file, you can specify this file in the Set Constraints File dialog box. The software implements your design to meet the specified timing requirements and other constraints specified in this file.
- In the Project Manager, select Implementation
Set Constraints File(s) to open the dialog box shown in the following figure.
- Make sure Copy Constraints Data From is selected.
- In the drop-down list box, choose one of the following.
- A revision that contains the user constraints file (UCF) you want to use for this implementation
- None if you do not want to copy constraints data
- Custom to guide from a specific file
If you select Custom, the following dialog box appears. Type the name of a specific file in the Constraints File field, or click Browse to open a file selection dialog box in which you can choose an existing UCF file.
- In the Set Constraints File dialog box, click OK.
When you implement the design, the Flow Engine uses the copied data to constrain the implementation.
Guide Files
You can select a previously routed or fitted implementation revision or a guide file to use as a guide for the current implementation. The procedure for guiding your implementation is the same for FPGAs and CPLDs. However, the way the design is implemented differs between the two.
Guiding FPGA Designs
When guiding an FPGA design, the software attempts to use the guide for placing logic and routing signals for the current implementation revision of the design. This ensures consistent implementations between place and route iterations. Guiding a design for an FPGA works as follows.
- If a component in the new design has the same name as that of the guide design or file, it is placed as in the guide.
- If an unnamed component in the new design is the same type as a component within the guide, it is placed as in the guide.
- If the signals attached to a component in the new design match the signals attached to the component of the guide, the pins are swapped to match the guide, where possible.
- If the signal names in the input design match the guide, and have the same sources and loads, the routing information from the guide design is copied to the new design.
After these components and signals are placed and routed, the remainder of the logic is placed and routed. If you have made only minor changes to your design and want the remaining logic placed and routed exactly as in your guide design, select the Match Guide Design Exactly option. This option locks the placement and routing of the matching logic so that it cannot change to accommodate additional logic.
Note: Setting the Match Guide Design Exactly option is not recommended for synthesis based designs.
Guiding CPLD Designs
For CPLDs, each time you implement your design, a guide file is created (design_name.gyd) which contains your pinout information. You can reuse this file in subsequent iterations of your design if you want to keep the same pinouts. If you select a valid implementation revision or guide file name, the pinouts from that file will be used when the design is processed.
Note: You can override guide file locations by assigning locations in your design file or constraints file.
Setting Guide Files
- In the Project Manager, select Implementation
Set Guide File(s) to open the dialog box shown in the following figure.
- Make sure Copy Guide Data From is selected.
- In the drop-down list box, choose one of the following.
- A revision that contains the guide file you want to use for this implementation
- None if you do not want to copy a guide file
- Custom to guide from any mapped or routed file for FPGAs or fitted file for CPLDs, including designs not generated from within the Design Manager
If you select Custom, the following dialog box appears. Type the name of a mapped, routed, or fitted file in the Guide File field, or click Browse to open a file selection dialog box in which you can choose an existing file. Choose an NCD file for FPGAs or a GYD file for CPLDs. You can also specify a mapping guide file for FPGAs.
Note: The implementation revision or revision data is based on a placed and routed design. Guide from a placed and routed file rather than a mapped file to reduce runtime. To guide from a mapped file, you must use the Custom option. If you use this option, you cannot guide mapping using the Set Floorplan File(s) command. Guided mapping is not supported for Virtex devices.
- In the Set Guide File(s) dialog box, make sure Enable Guide is selected.
By default, this option is enabled and instructs the software to use the specified guide file. If you do not want to guide your design but want to keep your guide file intact, disable this option.
- For FPGA devices, select Match Guide Design Exactly if you want to lock the placement and routing of matching logic.
If you do not select this option, the guide files are used as a starting point only. This allows the mapper, placer, and router greater flexibility in accommodating design modifications, often resulting in greater overall success.
Note: For synthesis-based designs, use the Match Guide Design Exactly option only if the guide file is from the same design version.
- Click OK.
When you implement the design, the Flow Engine uses the copied data to guide the implementation.
Floorplan Files
When you use the Floorplanner, an MFP file is generated that contains mapping information. You can instruct the Design Manager to use this file as a guide for mapping an implementation revision using the Set Floorplan File(s) command. To use this command, you must select an implementation revision that has been mapped and modified using the Floorplanner. For information on using the Floorplanner, see the Floorplanner Guide.
Note: If you use the Set Floorplan File(s) command you cannot guide mapping using the Set Guide File(s) command Custom option. The Set Floorplan File(s) command is available for the XC4000, Virtex, and Spartan device families only.
- From the Project Manager, select Implementation
Set Floorplan File(s) to open the dialog box shown in the following figure.
- Make sure Copy Floorplan Data From is selected.
- In the drop-down list box, choose one of the following.
- A revision that contains the floorplan files you want to use for this implementation
- None if you do not want to copy floorplan data
- Custom to guide from any mapped file in your file system, including designs not generated from within the Design Manager
If you select Custom, the following dialog box appears. Type the name of a specific file in the Floorplanning File field, or click Browse to open a file selection dialog box in which you can choose an existing file. Specify an FNF file for the Floorplanning File field and an MFP file for the Floorplanned Guide File field.
- In the Set Floorplan File(s) dialog box, make sure Enable Floorplan is selected.
Note: By default, this option is enabled and instructs the software to use the specified Floorplanner file. If you do not want to guide your design but want to keep your Floorplanner file intact, disable this option.
- Click OK.
The Flow Engine uses the copied data to guide the implementation.