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Foundation Series 2.1i User Guide
Chapter 11: Design Implementation

Setting Control Files

You can designate a user constraints file, guide files, or Floorplan files to control the current implementation. You can set the control files from the Project Manager's Implementation pulldown menu or via the Control Files Set button on the Synthesis/Implementation dialog box.

User Constraints File

User constraints files (design_name.ucf) contain logic placement and timing requirements to control the implementation of your design. Refer to the “Foundation Constraints” appendix for detailed information on creating .ucf files and on constraint syntax.

If you want to control the implementation of your design with a user constraints file, you can specify this file in the Set Constraints File dialog box. The software implements your design to meet the specified timing requirements and other constraints specified in this file.

  1. In the Project Manager, select Implementation Set Constraints File(s) to open the dialog box shown in the following figure.

    Figure 11.2 Set Constraints File Dialog Box

  2. Make sure Copy Constraints Data From is selected.

  3. In the drop-down list box, choose one of the following.

  4. In the Set Constraints File dialog box, click OK.

    When you implement the design, the Flow Engine uses the copied data to constrain the implementation.

Guide Files

You can select a previously routed or fitted implementation revision or a guide file to use as a guide for the current implementation. The procedure for guiding your implementation is the same for FPGAs and CPLDs. However, the way the design is implemented differs between the two.

Guiding FPGA Designs

When guiding an FPGA design, the software attempts to use the guide for placing logic and routing signals for the current implementation revision of the design. This ensures consistent implementations between place and route iterations. Guiding a design for an FPGA works as follows.

After these components and signals are placed and routed, the remainder of the logic is placed and routed. If you have made only minor changes to your design and want the remaining logic placed and routed exactly as in your guide design, select the Match Guide Design Exactly option. This option locks the placement and routing of the matching logic so that it cannot change to accommodate additional logic.

Note: Setting the Match Guide Design Exactly option is not recommended for synthesis based designs.

Guiding CPLD Designs

For CPLDs, each time you implement your design, a guide file is created (design_name.gyd) which contains your pinout information. You can reuse this file in subsequent iterations of your design if you want to keep the same pinouts. If you select a valid implementation revision or guide file name, the pinouts from that file will be used when the design is processed.

Note: You can override guide file locations by assigning locations in your design file or constraints file.

Setting Guide Files

  1. In the Project Manager, select Implementation Set Guide File(s) to open the dialog box shown in the following figure.

    Figure 11.4 Set Guide File(s) Dialog Box

  2. Make sure Copy Guide Data From is selected.

  3. In the drop-down list box, choose one of the following.

  4. In the Set Guide File(s) dialog box, make sure Enable Guide is selected.

    By default, this option is enabled and instructs the software to use the specified guide file. If you do not want to guide your design but want to keep your guide file intact, disable this option.

  5. For FPGA devices, select Match Guide Design Exactly if you want to lock the placement and routing of matching logic.

    If you do not select this option, the guide files are used as a starting point only. This allows the mapper, placer, and router greater flexibility in accommodating design modifications, often resulting in greater overall success.

    Note: For synthesis-based designs, use the Match Guide Design Exactly option only if the guide file is from the same design version.

  6. Click OK.

    When you implement the design, the Flow Engine uses the copied data to guide the implementation.

Floorplan Files

When you use the Floorplanner, an MFP file is generated that contains mapping information. You can instruct the Design Manager to use this file as a guide for mapping an implementation revision using the Set Floorplan File(s) command. To use this command, you must select an implementation revision that has been mapped and modified using the Floorplanner. For information on using the Floorplanner, see the Floorplanner Guide.

Note: If you use the Set Floorplan File(s) command you cannot guide mapping using the Set Guide File(s) command Custom option. The Set Floorplan File(s) command is available for the XC4000, Virtex, and Spartan device families only.

  1. From the Project Manager, select Implementation Set Floorplan File(s) to open the dialog box shown in the following figure.

    Figure 11.6 Set Floorplan File(s) Dialog Box

  2. Make sure Copy Floorplan Data From is selected.

  3. In the drop-down list box, choose one of the following.

  4. In the Set Floorplan File(s) dialog box, make sure Enable Floorplan is selected.

    Note: By default, this option is enabled and instructs the software to use the specified Floorplanner file. If you do not want to guide your design but want to keep your Floorplanner file intact, disable this option.

  5. Click OK.

    The Flow Engine uses the copied data to guide the implementation.