|
|
|
|
|
For FPGAs, options specify how a design is optimized, mapped, placed, routed, and configured. For CPLDs, they control how a design is translated and fit. Implementation options are specified in the Options dialog box.
In a Schematic Flow project, select Options on the Implement Design dialog box to access the Options dialog box shown in the following figure.
In an HDL Flow project, select Options on the Synthesis/Implementation dialog box to access the Options dialog box.
The Place & Route Effort Level setting controls how much effort the placer and router should use to best place and route a design at the expense of longer runtimes.
The Program Options are grouped into implementation, simulation, and configuration options. These can be used to create customized templates for various implementation styles you may want to try. For example, one implementation style could be Quick Evaluation, while another could be Timing Constraint Driven.
You can have multiple templates in a project. By choosing a template, you are choosing an implementation, simulation, or configuration style. In the Program Option portion of the Options Dialog, select Edit Options for Implementation, Simulation, or Configuration to access the associated template. An example of the Implementation Options dialog box is shown in the following figure. The options shown in each template depends on the target device family. For detailed information on the templates for each device family, refer to the“Implementation Flow Options” chapter of the Design Manager/Flow Engine Guide.
Implementation templates control how the software maps, places, routes, and optimizes an FPGA design and how the software fits a CPLD design.
Simulation templates control the creation of netlists in terms of the Xilinx primitive set, which allow you to simulate and back-annotate your design. In back-annotation, physical design data is distributed back to the logic design to perform back-end simulation. You can perform front and back-end simulation on both pre- and post-routed designs. Select a simulation template to use from the Simulation drop-down list.
Configuration templates control the configuration parameters of a device, the startup sequence, and readback capabilities. Select a configuration template to use in this implementation from the Configuration drop-down list.
Note: Configuration options are supported for the FPGA device families only. There are no configuration options for the CPLD families.
To create new templates or as an alternate way to access the templates use the Template Manager.
Utilities Implementation Template Manager. This opens the Template Manager dialog box.