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Foundation Series 2.1i User Guide
Chapter 9: CORE Generator System

Accessing the CORE Generator System

In the Foundation Series 2.1i software, the CORE Generator System must be started within a valid Foundation project. Within an open project, it can be started from the Project Manager window using Tools Design Entry CORE Generator. It can also be started within the HDL Editor or the Schematic Editor by selecting Tools CORE Generator.

The Xilinx CORE Generator dialog box (an example is shown below) then opens to allow selection of the available COREs. The COREs are categorized on the left side of the window. The specific COREs are selected in the “Contents of” section of the window.

You can select Project Project Options to access the project setup options. However, the Foundation Series software automatically sets the Project Options (shown in the following figure) to the appropriate values for the project. You do not need to set them manually.

You select a CORE by clicking on its name in the “Contents of” section of the CORE Generator window. This opens a new window where you can customize the CORE for your use, view its data sheet, and get other information concerng the CORE. The items that can be customized for a particular CORE depend on what the CORE is. The following figure shows that window that opens when you select a single port block memory core for a Virtex project.

Click the Data Sheet button to view detailed information on the CORE. You must have the Adobe Acrobat Reader installed on your PC to view the data sheet.

After you customize the CORE for your project, you need to generate the new CORE.

After the CORE has been successfully generated, the new CORE and its related files are placed in the current Foundation project directory for use in a schematic or HDL file.

You can select a schematic CORE from the SC Symbols menu in the Schematic Editor. An example of a schematic CORE is shown in the following figure.

As shown in the figure below, the Language Assistant in the HDL Editor (Tools Language Assistant) includes CORE Generator Modules. You can get assistance with instantiating them in VHDL or Verilog.