Resolution Functions

Resolution functions are used with signals that can be connected (wired together). For example, if two drivers directly connect to a signal, the resolution function determines whether the signal value is the AND, OR, or three-state function of the driving values.

Use resolution functions to assign the driving value when there are multiple drivers. For simulation, you can write an arbitrary function to resolve bus conflicts.

Note: A resolution function might change the value of a resolved signal, even if all drivers have the same value.

The resolution function for a signal is part of that signal's subtype declaration. You create a resolved signal in four steps.

1. Declare the signal's base type.
   
   

   type SIGNAL_TYPE is ...
   
   -- signal's base type is SIGNAL_TYPE

   
   
   
2. Declare the resolution function.
   
   

   function res_function (DATA: ARRAY_TYPE) 
   
   return SIGNAL_TYPE is
   
   -- declaration of the resolution function
   
   -- ARRAY_TYPE must be an unconstrained array of
   
   -- SIGNAL_TYPE 

   
   
   
3. Declare the resolved signal's subtype as a subtype of the base type, which includes the name of the resolution function.
   
   

   subtype res_type is res_function SIGNAL_TYPE;
   
   -- name of the subtype is res_type
   
   -- name of function is res_function
   
   -- signal type is res_type (a subtype of SIGNAL_TYPE)

   
   
   
4. Declare resolved signals as resolved subtypes.
   
   

signal resolved_signal_name:res_type;

-- resolved_signal_name is a resolved signal

Foundation Express does not support arbitrary resolution functions. Only wired AND, wired OR, and three-state functions are allowed. Foundation Express requires that you mark all resolution functions with a special directive indicating the kind of resolution you want to perform.

Foundation Express considers the directive only when creating hardware. The body of the resolution function is parsed but ignored. Using unsupported VHDL constructs generates errors. (See the “VHDL Constructs” chapter.)

Do not connect signals that use different resolution functions. Foundation Express supports only one resolution function per network.

The three resolution function directives follow.

• synopsys resolution_method wired_and
  
  
• synopsys resolution_method wired_or
  
  
• synopsys resolution_method three_state
  
  

Pre-synthesis and post-synthesis simulation results might not match if the body of the resolution function the simulator uses does not match the directive the synthesizer uses.

The following example shows how to create and use a resolved signal and how to use Foundation Express directives for resolution functions. The signal's base type is the predefined type BIT.

package RES_PACK is

  function RES_FUNC(DATA: in BIT_VECTOR) return BIT;

  subtype RESOLVED_BIT is RES_FUNC BIT;

end;

package body RES_PACK is

  function RES_FUNC(DATA: in BIT_VECTOR) return BIT is

    -- synopsis resolution_method wired_and

  begin

  -- The code in this function is ignored by

  -- the program

  -- but parsed for correct VHDL syntax

    for I in DATA'range loop

      if DATA(I) = '0' then

         return '0';

      end if;

    end loop;

    return '1';

  end;

end;

use work.RES_PACK.all;

entity WAND_VHDL is

  port(X, Y: in BIT; Z: out RESOLVED_BIT);

end WAND_VHDL;

architecture WAND_VHDL of WAND_VHDL is

begin

  Z <= X;

  Z <= Y;

end WAND_VHDL;

The following figure shows the design.

Figure 2.2 Design Using Resolved Signal