PPT 슬라이드
- Decoder (1) : (WHEN ELSE 구문 (1), Concatination)
library ieee;
use ieee.std_logic_1164.all;
entity dec is
port(
a,b,c,d : in std_logic;
y : out std_logic
);
end dec;
architecture a_dec of dec is
signal din : std_logic_vector(3 downto 0);
signal v3,v4,v6,va : std_logic;
begin
din <= a & b & c & d;
v3 <= ‘1’ when din = “0011” else ‘0’;
v4 <= ‘1’ when din = “0100” else ‘0’;
v6 <= ‘1’ when din = “0110” else ‘0’;
va <= ‘1’ when din = “1010” else ‘0’;
y <= v3 or v4 or v6 or va;
end a_dec;