PPT 슬라이드
- Decoder (1) : (WHEN ELSE 구문 (3))
library ieee;
use ieee.std_logic_1164.all;
entity dec is
port(
a,b,c,d : in std_logic;
y : out std_logic
);
end dec;
architecture a_dec of dec is
signal din : std_logic_vector(3 downto 0);
begin
din <= a & b & c & d;
y <= ‘1’ when
(din = “0011”) or (din = “0100”) or
(din = “0110”) or (din = “1010”)
else ‘0’;
end a_dec;