Required Software

To enter designs using schematics and program Xilinx FPGAs and CPLDs, you need the following software programs.

• Cadence Release 97A, as described in the “Platform Support” section of the “Introduction” chapter. This chapter shows which version to use on your particular platform. Ensure your installation of Cadence includes the following components.
  
  
  • Concept
    
    
  • Verilog-XL
    
    
  • CONCEPT2XIL (EDIF netlister) - available from the Cadence ftp site
    
    
  • XIL2CDS (for optional board-level integration) - available from the Cadence ftp site
    
    
• Libraries supplied by Xilinx
  
  
  • Concept Unified Libraries for schematic entry
    
    
  • Verilog Unified Library simulation models for Verilog functional simulation
    
    
  • SIMPRIM-based Verilog simulation models for Verilog timing simulation
    
    
• Xilinx Development System software that must include at least the following executables
  
  
  • EDIF2NGD
    
    
  • NGDBuild
    
    
  • MAP
    
    
  • PAR
    
    
  • TRCE (optional for static timing analysis)
    
    
  • NGDAnno
    
    
  • NGD2VER
    
    
  • BitGen
    
    

For a description of Xilinx/Cadence platform support, refer to the “Platform Support” section of the “Introduction” chapter.