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Creating Bodies for Non-Schematic Design Blocks

You must also create a body for each non-schematic block contained within your schematics. If you do not create and instantiate a body for a non-schematic block in your schematic, CONCEPT2XIL or NGDBuild do not properly create a netlist. The following sections describe how to create a body for your non-schematic blocks using Concept's genview utility.

For details about how to create symbols using genview, refer to the “Generating Design Views,” “Using Genview for Top-Down Design,” and “Using Genview for Bottom-Up Design” sections in the “Creating Blocks” chapter of the Concept Schematic User Guide.

Creating a Body for a Verilog Netlist

To incorporate a Verilog netlist into your design schematic, you need to create a body for that block. Follow these steps to create a body for each block.

  1. Copy the Verilog netlist for your sub-block into the project directory, and type the following in the command line window within Concept.

    genview -i module_name.v -v logic body verilog

    This tells Concept to generate a body view for a module named module_name from the Verilog netlist, and to copy the associated Verilog netlist to a file named verilog.v in the logic view for this module. Genview also adds a reference to this new block in your .wrk file. This reference to the new block in your .wrk file allows you to access this body file for use in your schematic.

    module_name.v is a Verilog file generated by LogiBLOX for functional simulation. See the “Processing Designs with LogiBLOX Components” appendix for details.

  2. After the module generates, you must also edit the resulting verilog.v file in the logic subdirectory of the new module directory. You then add the definition, parameter cds_action=”ignore”; after the module declaration, as in the following example.

   module mycount (load, up_dn, clk_en, clock, async_ctrl, term_cnt, d_in, q_out
     );
   parameter cds_action=”ignore”; // <---- Add this line
       input load;
       input up_dn;
       input clk_en;
       input clock;
       input async_ctrl;
       output term_cnt;
       input [3:0] d_in;
       output [3:0] q_out;

You must add this parameter definition. The cds_action=”ignore” parameter tells CONCEPT2XIL to not try to look for additional design hierarchy beyond this block, because there are no underlying schematics for the block.

You now have a body for your logic block that you can use.

Generating a Body for a Schematic

To generate a body from a schematic, follow these steps.

  1. Within Concept, edit the schematic.

    edit schematic_name

  2. Type genview in the command window.

A body drawing creates automatically for your schematic.

Generating a Body for an XNF, NGO, or EDIF File

You can manually create a body for an XNF, NGO, or EDIF file using the Concept badd command. For details, refer to the section, “Creating a Block Diagram” in Chapter 5, Creating Blocks of the Cadence manual, Concept Schematic User Guide.

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