Command Summaries

Although this tutorial uses the Cadence Design Manager and the Xilinx Design Manager to process the Calc design, you can also manually run the individual programs that these tools run.

This section details command sequences that you can use to perform the translations the Xilinx Design Manager performs in this tutorial. Write the commands as you would type them at the system prompt or in a batch file. You can also see a summary of these system commands by using the Utilities Command History and Utilities Command Preview selections in Design Manager or Flow Engine. After entering the Command History or Command Preview dialog box, select the display Mode to Command Line to see the detailed system commands, including command-line options, used by Flow Engine. You can cut and paste from these Command dialog boxes into your text editor to create batch files.

NOTE

The commands listed here differ slightly from the commands in the Command History and Command Preview windows. The commands listed here show how you would typically execute the Xilinx programs from the system prompt, outside of the Xilinx Design Manager framework. The commands listed in the Command History and Command Preview windows reflect how Flow Engine executes Xilinx programs to fit into the Xilinx Design Manager framework.

Functional Simulation for XC4000E Family Designs

concept2xil -sim_only -family xce4000e calc

verilog +delay_mode_unit calcf.stim calc.v \
-f calc.vf

Basic Translation for XC4000E Family Designs

ngdbuild -p XC4000E -uc calc_4ke.ucf calc.edf \
  calc.ngd
map -p XC4003E-4-PC84 -o calc_map.ncd \
  calc.ngd calc.pcf
trce calc_map.ncd -a -o calc_map.twr
par -w calc_map.ncd calc.ncd calc.pcf
trce calc.ncd -a -o calc.twr
ngdanno calc.ncd calc_map.ngm
ngd2ver -tf -w -ul calc.nga time_sim.v
bitgen calc.ncd -l -w -f bitgen.ut

Timing Simulation for XC4000E Family Designs

verilog calct.stim time_sim.v
simwave &

Incremental Translation for XC4000E Family Designs

mv calc.ncd calc_guide.ncd
mv calc.mdf calc_guide.mdf
ngdbuild -p XC4000E -uc calc_4ke.ucf calc.edf \
  calc.ngd
map -p XC4003E-4-PC84 -o calc_map.ncd \
  -gf calc_guide.ncd calc.ngd calc.pcf
trce calc_map.ncd -a -o calc_map.twr
par -w -l 4 -gf calc_guide.ncd calc_map.ncd \
  calc.ncd calc.pcf
trce calc.ncd -a -o calc.twr
ngdanno calc.ncd calc_map.ngm
ngd2ver -tf -w -ul calc.nga time_sim.v
bitgen calc.ncd -l -w -f bitgen.ut