Displaying Resources and Logic

You can display the logic resources that are available on the FPGA in the Floorplan and Placement windows. For example, the XC4000 family has these resources: F, G, and H function generators, Global Buffers, D-type flip-flops, Tristate Buffers, I/O, and RAM/ROM.

NOTE

Screen refreshes take longer when you display all of the resource graphics in the Floorplan and Placement windows than when you just use the default settings.

By default the CLB resources are turned off to reduce the clutter in the Floorplan window. Only the Grid and I/O options are enabled.

1. Activate either the Floorplan or Placement window by clicking on the window title bar with the left mouse button.
   
   
2. Select View Options or press the F2 key.
   
   This command opens the Options dialog box.
   
   
3. In the Resources panel, determine the type of resources that you want displayed in the selected (either Placement or Floorplan) window and click those boxes to enable the display.
   
   

The following figure illustrates a partial display for an XC4000 device with all of the resources in the CLB enabled for display.

Figure 4.12 Display of Resources in the Floorplan Window

The following table shows how resources and placed logic affect which information the floorplan and placement windows display.

Table 4_1 Resource Graphics Display