How to Interleave Buses
This procedure explains how to interleave buses. The Floorplan 
Distribute Options command makes interleaving easy. Interleaving spreads out the resources associated with a bus, such that other logic can be interspersed with the bus. A goal of interleaving is to minimize the distance between similar bits of interrelated buses.
Perform the following steps each time you begin this procedure.
- Determine the spacing requirements that suits your particular interleave scheme.
- Select Floorplan Distribute Options and set the Interleave Factor to change the spacing value.
NOTEAn interleave factor of 2 causes the Floorplanner to place selected logic in every second available resource in the floorplan; a value of 3 causes the Floorplanner to place selected logic in every third available resource.
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Design Example
The following figure shows the example design, which contains a 16-bit bus (REGISTER_A/Q) that talks to an 8-bit bus (LITTLE_BUS_OUT).
The following figure shows the expanded hierarchy of the interleave design.
Four new groups were created from the expanded hierarchy to make floorplanning easier.
- REGISTER_A_LSB
- REGISTER_A_MSB
- DIN_LSB
- DIN_MSB
The following figure shows the interleave design hierarchy with the four new groups. Note the “Grouped by: User” annotation on the symbol line.
NOTEThe placement used throughout this example is exploded to make it easier to view; it is not optimal floorplanning placement. During floorplanning you would choose a placement that is closer together, resulting in shorter interconnections.
| The next six figures show step-by-step the sequence for placing the groups of logic into the Floorplan window. The seventh figure shows the final placement in the Floorplan window of the interleave design. The ratsnest display shows the relative distance and connectivity of the nets.
