Chapter 8

Register and Three-State Inference

You can generally use several different, but logically equivalent, VHDL descriptions to describe a circuit.

This chapter illustrates how to write VHDL descriptions to produce efficient synthesized circuits. The chapter is divided into the following sections.

• “Register Inference”
  
  
• “Three-State Inference”
  
  

You can use VHDL to make your design more efficient in terms of the synthesized circuit's area and speed, as follows.

• Minimize the number of latches or flip-flops required when a design needs some, but not all, of its variables or signals stored during operation
  
  
• During synthesis, collapse part of the hierarchy in a design that you described more easily with several levels of hierarchy, so that the design can be synthesized more efficiently.