3rd Party Support & Libraries

• Xilinx 3rd Party Design Entry & Simulation Support

  • Synopsys, Cadence, Mentor Graphics, Aldec (Foundation)
  • Viewlogic, Synplicity, OrCad, Model Technologies, Synario, Exemplar and others supply libs & interfaces
  • Industry standard file formats:
    • VHDL, Verilog, and EDIF netlist formats
    • SDF Standard Delay files
    • VITAL library support

• Xilinx Libraries

  • Optimized components for use in any Xilinx FPGA or CPLD
  • Wide range of functions
    • Comparators, Arithmetic functions, memory
    • DSP and PCI interfaces
  • Easy to use with ABEL, VHDL, Verilog, schematic entry

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