PPT 슬라이드

Distributed RAM & Distributed Arithmetic (DA):

Perfect Match

4-Input

LUT

4-Input

LUT

ADD

or

ACC.

Basic DA Structure Matches

XC4000 Architecture

N-bits

DA Algorithms:

• 4-Input Look-Up-Tables (LUT)
  Scaled with adders
  

• For higher performance
  Use more LUTs
  
  = more parallelism

• Efficiency similar to custom solution
  Achievable with LUT logic
  
  More ASIC gate equivalents
  More cost effective

이전 슬라이드

다음 슬라이드

첫 슬라이드로 이동

그래픽 버전 보기