Indirectly Specifying tCO

You can indirectly specify tCO for all registered output paths in your design using the Clock-to-Pad timespec. Clock-to-Pad paths begin at flip-flop clock inputs, propagate through the flip-flop Q output and any number of levels of combinatorial logic and end at the output pad. Clock-to-Pad paths also trace through the enable inputs of 3-state controlled pads.

Clock-to-Pad paths do not propagate through clock, and asynchronous set and reset inputs of registers as shown below. These paths are also broken at bidirectional pins.

To specify a Clock-to-Pad path, use the clock path delay from the device data sheets and calculate the Clock-to-Pad delay to be used as the value in the timing constraint with the following equation for global clocks:

Clock-to-Pad Value = desired tCO - tGCK

Use the following equation for product term clocks:

Clock-to-Pad Value = desired tCO - (tIN + tPTCK)

The format of the Clock-to-Pad timespec is:

TSnn=FROM:flip_flop_group:TO:output_pad:clock_to_pad_value

For example, if you need an external tCO of no more than 10 ns for all outputs from an XC95108-10 global clock (GCK = 3ns), use the following timing constraint:

TS01=FROM:FFS:TO:PADS:7

If you need an external tCO of no more than 20 ns for a specific output, “Q” for example, from an XC95108-10 product term clock (tIN = 3.5ns, tPTCK = 3.5ns), use the following timing constraint:

TS01=FROM:FFS:TO:PADS(Q):13

Entering Timespecs in a UCF File

Grouping Signals