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Istype 'invert'
Inverter Attribute

Syntax

signal_name [,signal_name] [PIN|NODE] ISTYPE 'invert' ;

Use

Signal attribute 'invert', along with its counterpart, 'buffer,' controls output inversion, enforcing the existence or non-existence of a hardware inverter at the device pin associated with the specified output signal.

In registered devices, the 'invert' attribute ensures that an inverter will be located between the output pin and its associated register output. This is important because the location of the inverter affects a register's reset, preset, preload, and powerup behavior (as observed on the associated output pin).

Note: The XC9500 family does not have inverters between the macrocell flip-flop and the output pin. However, the existance of an inverter is emulated for register behavior that is defined with detailed dot extensions. It is not recommended that the 'invert' attribute be used when targeting Xilinx CPLD devices.


See Also

'buffer'