Multiplexing Output Signals vs 3-State Busses

Three methods of multiplexing output signals are shown below. The method you choose depends on your application, resources and speed requirements. These methods are more efficient than using internal busses when implemented in a CPLD.

You can implement an output multiplexer by using three-state controls and tying the pins together off-chip. This uses more pins but you do not need a macrocell to implement the multiplexer as shown below.

You can implement a multiplexer in another macrocell and bring the data out though a single pin. This saves pins but costs a macrocell to implement each bit of the multiplexer as shown below.

You can register the output macrocell to shorten the clock-to-output delay as shown below.

Multiplexing Output Signals in ABEL

Multiplexing Output Signals in VHDL

Multiplexing Output Signals in Verilog