Xilinx Property INIT

Use INIT to control the initial value of macrocell registers during device power up.

By default, all macrocell registers in Xilinx CPLDs power up to the zero (reset) state. Use the INIT property for registers that must power up to a logic 1 state. Use the following syntax:

xilinx property ‘INIT={S|R} signal_list’;

S and R indicate logic 1 and logic 0 respectively.

For example, if you want to initialize selected registers to 1 use:

xilinx property ‘INIT=S count0 count1 count2’;

Note: Because this property is only passed to the CPLD Fitter, the initial state value will not be reflected in the functional simulation.