Xilinx Property BLOCK

Use the BLOCK property to pass the LOC constraint to control logic placement in Xilinx CPLDs. To assign a node to a particular function block, use:

xilinx property ‘BLOCK signal_name LOC=FBn’

where n is the function block number. For example, to assign node xyz to function block 7 use:

xilinx property ‘BLOCK xyz LOC=FB7’

To assign a node to a specific macrocell use:

xilinx property ‘BLOCK signal_name LOC=FBn_m’

where n is the function block number and m is the macrocell number as defined in the data sheet. For example, to assign node xyz to function block 7, macrocell 1, use:

xilinx property ‘BLOCK xyz LOC=FB7_1

You can also use the BLOCK property as an alternative way to specify LOC properties for alphanumeric pin names used on CSP and BGA type packages. For example, to assign signal xyz to pin A2, use:

xilinx property ‘BLOCK xyz LOC=A2’;

Note: You can only specify one signal name per BLOCK property statement.