DFF - rising_edge
rising_edge
IEEE function that is defined in the
std_logic_1164 package
specifies that the signal value
must be 0 to 1
X, Z to 1 transition is not allowed
LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY dff_b IS
PORT ( d : in std_logic;
clk : in std_logic;
q : out std_logic
);
END dff_b;
ARCHITECTURE behavior OFdff_b IS
BEGIN
PROCESS(clk)
BEGIN
IF rising_edge(clk) THEN
q <= d;
END IF;
END PROCESS;
END behavior;
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