case Statements

The case statement executes one of several sequences of statements, depending on the value of a single expression. The syntax follows.

case expression is

     when choices =>

          { sequential_statement }

   { when choices =>

          { sequential_statement } }

end case;

expression must evaluate to an INTEGER, an enumerated type, or an array of enumerated types, such as BIT_VECTOR. Each of the choices must be in the following form.

choice { | choice}

Each choice can be either a static expression (such as 3) or a static range (such as 1 to 3). The type of choice_expression determines the type of each choice. Each value in the range of the choice_expression type must be covered by one choice.

The final choice can be others, which matches all remaining (unchosen) values in the range of the expression's type. The others choice, if present, matches expression only if no other choices match.

The case statement evaluates expression and compares that value to each choice value. The when clause with the matching choice value has its statements executed.

The following restrictions are placed on choices.

• No two choices can overlap.
  
  
• If an others choice is not present, all possible values of expression must be covered by the set of choices.
  
  

Using Different Expression Types

The following example shows a case statement that selects one of four signal assignment statements by using an enumerated expression type. The figure that follows the example illustrates the corresponding design with binary encoding specified.

library IEEE;

use IEEE.STD LOGIC 1164.all;

package case enum is

type ENUM is (PICK_A, PICK_B, PICK_C, PICK_D);

end case enum;

library work;

use work.case enum.all;

entity example5 9 is

   port (

      signal A, B, C, D: in BIT;

      signal VALUE: ENUM;

      signal Z:  out BIT;

   );

end example5 9;

architecture behave of example5 9 is

begin

process (VALUE)

begin

   case VALUE is

      when PICK_A =>

         Z <= A;

      when PICK_B =>

         Z <= B;

      when PICK_C =>

         Z <= C;

      when PICK_D =>

         Z <= D;

   end case;

end process;

end behave;

Figure 5.3 Circuit for case Statement with an Enumerated Type

The following example shows a case statement again used to select one of four signal assignment statements, this time by using an integer expression type with multiple choices. The resulting circuit design is shown in the figure following the example.

entity example5_10 is

   port (

      signal VALUE: in INTEGER range 0 to 15;

      signal Z1, Z2, Z3, Z4:  out BIT

      );

end example5_10;

architecture behave of example5_10 is

begin

   process (VALUE)

begin

Z1 <= '0';

Z2 <= '0';

Z3 <= '0';

Z4 <= '0';

case VALUE is

  when 0 =>             -- Matches 0

    Z1 <= '1';

  when 1 | 3 =>         -- Matches 1 or 3

    Z2 <= '1';

  when 4 to 7 | 2 =>    -- Matches 2, 4, 5, 6, or 7

    Z3 <= '1';

  when others =>        -- Matches remaining values,

                        --   8 through 15

    Z4 <= '1';

end case;

end process;

end behave;

Figure 5.4 Circuit for case Statement with Integers

Invalid case Statements

The following example shows invalid case statements with explanatory comments.

signal VALUE:  INTEGER range 0 to 15;

signal OUT_1:  BIT;

case VALUE is   -- Must have at least one when clause

end case; 

case VALUE is   -- Values 2 to 15 are not covered by choices

  when 0 => 

    OUT_1 <= '1';

  when 1 =>

    OUT_1 <= '0';

end case;

case VALUE is           -- Choices 5 to 10 overlap

  when 0 to 10 =>

    OUT_1 <= '1';

  when 5 to 15 =>    

    OUT_1 <= '0';

end case;